1. Field of the Invention
The present invention relates to an electrical connector for electrically connecting an electronic package such as a land grid array (LGA) chip with a circuit substrate such as a printed circuit board (PCB), and particularly to an electrical connector with terminals each having a plurality of interference blocks.
2. Description of the Prior Art
Land grid array (LGA) connectors are widely used in personal computer (PC) systems to electrically connect LGA chips with PCBs. An LGA connector comprises a multiplicity of terminals arranged in a housing in a rectangular array. Each terminal has a first contact portion soldered to a PCB, and a second contact portion depressed by and engaging with a corresponding contact pad of an LGA chip. Thus the LGA chip and the PCB are electrically connected by the connector.
U.S. Pat. Nos. 5,653,598 and 6,176,707 and Taiwan Pat. No. 501318 each disclose a conventional LGA electrical connector. Referring to FIG. 7, U.S. Pat. No. 6,176,707 discloses a conventional terminal 6 of an LGA electrical connector. The terminal 6 is stamped from a resilient metal strip, and comprises a connection portion 60 with a pair of opposite interference blocks 62. The two interference blocks 62 protrude from opposite sides of the connection 60 respectively, for interferentially fixing the terminal 6 in a corresponding passageway of a housing of the LGA connector (not shown). A convex first top spring arm 64 extends upwardly and forwardly from the connection portion 60. An opposite convex second bottom spring arm 66 extends downwardly and forwardly from the connection portion 60. The first spring arm 64 has a curved top first contact portion 640 for engaging with a plate-like contact pad of an LGA chip (not shown) when the LGA chip is pressed against the LGA connector. The second spring arm 66 has a curved bottom second contact portion 660 for soldering to a PCB (not shown). Thus the terminal 6 electrically connects the LGA chip and the PCB.
However, a junction of each interference block 62 and the connection portion 60 is relatively small compared with a width of the interference block 62. Thus the interference blocks 62 are liable to deform when the terminal 6 is engaged in the corresponding passageway of the housing, and in subsequent use of the LGA electrical connector. When this happens, interferential force between the terminal 6 and the housing in the passageway is reduced, resulting in the terminal 6 not being securely fastened in the passageway. This can lead to disruption or failure of electrical connection between the LGA chip and PCB.
A new LGA electrical connector which overcomes the above-mentioned problems is desired.